1. Field of the Invention
The invention relates in general to a charge trapping memory and an accessing method thereof, and more particularly to a charge trapping memory and an accessing method capable of ensuring reading reliability.
2. Description of the Related Art
Electrically erasable and programmable non-volatile memories are used in various applications, and a charge trapping memory based on a charge trapping dielectric layer is one of the electrically erasable and programmable non-volatile memories. The charge trapping dielectric layer such as a silicon nitride layer is utilized to trap charges and store data. When negative charges are being trapped, the threshold voltage of the memory cell increases. The threshold voltage of the memory cell is reduced when the negative charges are removed from the charge trapping dielectric layer. However, the threshold voltage of the memory cell is decreased and an operation window is shifted due to the charge loss after multiple times of cycling or data retention. Consequently, the unreliability will occur when the memory cell is read again.
The conventional solution is to utilize a cycling table for storing the operation condition of the memory cell, and then the memory cell is read according to this cycling table so as to ensure the reliability of reading the memory cell. However, this cycling table cannot solve the problem caused by the charge loss after the data retention. In addition, it is a quite complicated work to define the cycling table according to different numbers of cycling.
In addition to the above-mentioned solution, the prior art also utilizes extra bits to calculate the numbers of “1” and “0” in the read data and compare the numbers of “1” and “0” in the read data with those in the previously written data. If the numbers are different from each other, the value of the reference current is adjusted, and then the memory cell is read again until the numbers are the same. However, if the memory is a charge trapping memory, the method mentioned hereinabove cannot be applied to the charge trapping memory due to the requirement of the high-speed operation.